femtoos_headers/femtoos_port.h

Go to the documentation of this file.

/*
 * Femto OS v 0.91 - Copyright (C) 2008-2009 Ruud Vlaming
 *
 * This file is part of the Femto OS distribution.
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, version 3 of the License.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 *
 * Please note that, due to the GPLv3 license, for application of this
 * work and/or combined work in embedded systems special obligations apply.
 * If these are not to you liking, please know the Femto OS is dual
 * licensed. A commercial license and support are available.
 * See http://www.femtoos.org/ for details.
 */

#ifndef FEMTOOS_PORT_H
#define FEMTOOS_PORT_H

#include "femtoos_globals.h"
#include "femtoos_constants.h"

#define portFlashReadByte(byteType, byteVar) ((byteType) pgm_read_byte(&(byteVar)))


#define portFlashReadWord(wordType, wordVar) ((wordType) pgm_read_word(&(wordVar)))


#define portFlashReadStruc(strucType, strucPointer, strucFieldType, strucField) ((strucFieldType) pgm_read_word(&(((strucType *)pgm_read_word(&strucPointer))->strucField)))


#define portInitCPUStatusRegister   0x00


#if (cfgSysSqueezeState == cfgTrue) && (cfgIntTickTrack == cfgTrue)
  #define portInitModeInterruptLoc     (0)
  #define portInitGlobalInterruptLoc   (SREG_H)
  #define portInitTickInterruptLoc     (SREG_I)
#elif (cfgSysSqueezeState == cfgTrue) && (cfgIntTickTrack == cfgFalse)
  #define portInitModeInterruptLoc     (0)
  #define portInitGlobalInterruptLoc   (SREG_H)
  #define portInitTickInterruptLoc     (0)
#elif (cfgSysSqueezeState == cfgFalse) && (cfgIntTickTrack == cfgTrue)
  #define portInitModeInterruptLoc     (SREG_I)
  #define portInitGlobalInterruptLoc   (SREG_H)
  #define portInitTickInterruptLoc     (SREG_T)
#elif (cfgSysSqueezeState == cfgFalse) && (cfgIntTickTrack == cfgFalse)
  #define portInitModeInterruptLoc     (0)
  #define portInitGlobalInterruptLoc   (SREG_I)
  #define portInitTickInterruptLoc     (0)
#endif


#define portBarrier()                        asm volatile ( "" ::: "memory" )

#define portNop()                            asm volatile ( "nop" :: )


#define portEnableGlobalInterrupts()         asm volatile ( "sei" ::: "memory" )


#define portDisableGlobalInterrupts()        asm volatile ( "cli" ::: "memory" )


#if (cfgSysSqueezeState == cfgFalse)
  /* The devAuxSysRegBit is assumed to be zero upon entry, signaling per default that the
   * interrupts are switched off. The value of the I bit is copied to the ARB bit. */
  #define portResqueGlobalInterruptState()            \
    asm volatile ( "brid 67f                \n\t"     \
                   "cli                     \n\t"     \
                   "sbi %[_ASR_],%[_ARB_]   \n\t"     \
                   "67:          " ::                 \
                   [_ARB_]       "i" (devAuxSysRegBit),     \
                   [_ASR_]       "i" (_SFR_IO_ADDR(devAuxSysReg)))
#else
  /* We signal with the H bit being zero that we originate from a manual Yield. The old
   * value of the I bit is copied to the H bit and the I bit is cleaned. The code below is
   * tricky. First we clean the H bit, and subsequently test if interrupts are enabled. If
   * so we must set the H bit and clean the I bit. The rest is unimportant, since we came from
   * a manual call. To save we first clean H and test for I afterwards. But what if an interrupt
   * comes after cleaning H and before the test? H could be set again when we return, since
   * the H bit may be not conserved due to our own approach. The point is, it does not matter. If
   * I was cleaned before, interrupts are not possible so H stays reset, and if I was not,
   * H will be set anyway. So we do not fear an interrupt here.
   * */
  #define portResqueGlobalInterruptState()                        \
    asm volatile ( "clh           \n\t"      /* Clear H bit  */   \
                   "brid 67f      \n\t"                           \
                   "cli           \n\t"      /* Clean I bit  */   \
                   "seh           \n\t"      /* Set H bit    */   \
                   "67:         " ::                              \
                   [_Hb_]       "i" (preBitSet1(0x00,SREG_H)) )
#endif


#if (cfgSysSqueezeState == cfgFalse)
  #define portResqueGlobalInterruptActive()            \
    asm volatile ( "sbi %[_ASR_],%[_ARB_]" ::          \
                   [_ARB_]  "i" (devAuxSysRegBit),     \
                   [_ASR_]  "i" (_SFR_IO_ADDR(devAuxSysReg)))
#else
    /* We only need to set the H bit to signal we come from an interrupt. The interrupt is
     * already disabled. The original status of the H bit is permanently lost. */
  #define portResqueGlobalInterruptActive()  \
    asm volatile ( "seh " :: )
#endif


void portReboot(void) __attribute__ ( ( naked, noreturn ) ) ;


#define portFSWriteReady() ((devEECR & (1 << devEEPE)) == 0)


void portFSWriteByte(Taddress pAddress, Tbyte bValue);


Tbyte portFSReadByte(Taddress pAddress);


#define portGetFullStack(field) \
  asm volatile ( "in %A0,__SP_L__     \n\t" \
                 "in %B0,__SP_H__   " :"=r" (field) : )

#define portGetReducedStack(field) \
  asm volatile ( "in %A0,__SP_L__     \n\t" \
                 "ldi %B0, 0x00   " :"=r" (field) : )

#define portSetFullStack(field) \
  asm volatile ( "out __SP_L__, %A0     \n\t" \
                 "out __SP_H__, %B0 " : : "r" (field) : "memory" )

#define portSetReducedStack(field) \
  asm volatile ( "out __SP_L__, %A0 " : : "r" (field) : "memory")


#define portSwapNibbles(field)  \
  asm volatile("swap %0" : "=r" (field) : "0" (field));


#if (devFLASHsize <= 0x1000UL)
  #define defJUMP  "rjmp"
  #define defCALL  "rcall"
#else
  #define defJUMP  "jmp"
  #define defCALL  "call"
#endif

#define portJump(destination) asm volatile ( defJUMP " " #destination :: )

#define portEventRegister devAuxEventReg

#define defEventRegisterAtomicOperation defAuxEventRegLowIO
#define defEqualAuxiliaryRegisters      preEqualMacros(devAuxSysReg,devAuxEventReg)

#if (devCLKPCE == cfgUndefined)
  #if (cfgSysClockDivider != 1)
    #error "cfgSysClockDivider can only be 1 for this device (no clock prescaler)."
  #endif
#else
  #if (cfgSysClockDivider == 1)
    #define defClockPrescaleBits 0x00
  #elif (cfgSysClockDivider == 2)
    #define defClockPrescaleBits 0x01
  #elif (cfgSysClockDivider == 4)
    #define defClockPrescaleBits 0x02
  #elif (cfgSysClockDivider == 8)
    #define defClockPrescaleBits 0x03
  #elif (cfgSysClockDivider == 16)
    #define defClockPrescaleBits 0x04
  #elif (cfgSysClockDivider == 32)
    #define defClockPrescaleBits 0x05
  #elif (cfgSysClockDivider == 64)
    #define defClockPrescaleBits 0x06
  #elif (cfgSysClockDivider == 128)
    #define defClockPrescaleBits 0x07
  #elif (cfgSysClockDivider == 256)
    #define defClockPrescaleBits 0x08
  #else
    #error "cfgSysClockDivider was not recognized for this device."
  #endif
#endif


#define defTimerPrescaleBits    (DefPrescaler(cfgSysSubTickDivider))

#if defined(devPrescale_1024)
  #define defDelayPrescaleBits devPrescale_1024
#elif defined(devPrescale_512)
  #define defDelayPrescaleBits devPrescale_512
#elif defined(devPrescale_256)
  #define defDelayPrescaleBits devPrescale_256
#elif defined(devPrescale_128)
  #define defDelayPrescaleBits devPrescale_128
#elif defined(devPrescale_64)
  #define defDelayPrescaleBits devPrescale_64
#elif defined(devPrescale_32)
  #define defDelayPrescaleBits devPrescale_32
#elif defined(devPrescale_16)
  #define defDelayPrescaleBits devPrescale_16
#elif defined(devPrescale_8)
  #define defDelayPrescaleBits devPrescale_8
#elif defined(devPrescale_4)
  #define defDelayPrescaleBits devPrescale_4
#elif defined(devPrescale_2)
  #define defDelayPrescaleBits devPrescale_2
#elif defined(devPrescale_1)
  #define defDelayPrescaleBits devPrescale_1
#else
  #error "No prescaler value for the delay loop possible."
#endif

#if (cfgNumSleepPeriod < 384)
  #define defWatchDogPrescaleBits  0x04
  #define defSleepRealPeriod        256
#elif (cfgNumSleepPeriod < 768)
  #define defWatchDogPrescaleBits  0x05
  #define defSleepRealPeriod        512
#elif (cfgNumSleepPeriod < 1536)
  #define defWatchDogPrescaleBits  0x06
  #define defSleepRealPeriod       1024
#elif (cfgNumSleepPeriod < 3072) || (devWDP3 == cfgUndefined)
  #define defWatchDogPrescaleBits  0x07
  #define defSleepRealPeriod       2048
#elif (cfgNumSleepPeriod < 6144)
  #define defWatchDogPrescaleBits  0x08
  #define defSleepRealPeriod       4096
#else
  #define defWatchDogPrescaleBits  0x09
  #define defSleepRealPeriod       8192
#endif


void portEnterGlobalInterrupts(void) __attribute__ ( ( naked, noinline ) );


void portExitGlobalInterrupts(void)  __attribute__ ( ( naked, noinline ) );


void portEnterTickInterrupts(void) __attribute__ ( ( naked, noinline ) );


void portExitTickInterrupts(void) __attribute__ ( ( naked, noinline ) );

void portDisableTickInterrupts(void) __attribute__ ( ( naked, noinline ) );


void portEnableTickInterrupts(void)__attribute__ ( ( naked, noinline ) );

#if (defSysGCCstartup == cfgReplace)
  #define portInit()
#else
  void portInit(void);
#endif


void portTrace(Tuint08 uiEvent);


void portIdle(void)  __attribute__ ( ( noreturn, naked ) );


void portSleep(Tuint08 uiTickBlockMinDelay);

void portShowError(Tuint08 uiMessage, Tuint08 uiCallId, Tuint08 uiInfoTask);

void portShowReset(void);


#if (true)
  #define portInitContext(TaskStart,StackTop,RegisterUse,InterruptStart) privInitContext(TaskStart,StackTop,RegisterUse,InterruptStart)
#else
  /* This is your prototype. Specify a function which intializes the context of each
   * task and sets the return addresses.  */
  Taddress portInitContext(Taddress pTaskStart, Taddress pStackTop, Tuint08 uiRegisterCount, Tuint08 uiInterruptStart);
#endif


void portEnterISR(void)  __attribute__ ( ( naked, noinline, used ) );


void portBeginISR(void)  __attribute__ ( ( naked, noinline, used ) );


void portReturnISR(void)  __attribute__ ( ( naked, noinline, used ) );


void portYieldISR(void)  __attribute__ ( ( naked, noinline, used ) );


void portSaveContext(void)  __attribute__ ( ( naked, noinline, used ) );


void portRestoreContext(void)  __attribute__ ( ( naked, noinline, used ) );


void portSetupTimerInterrupt(void);


Tuint08 portReadTimer(void);


Tbool portCheckTimer(void);


Tuint08 portReadAndResetTimer(Tuint08 uiSubTickInterrupt);


void devSigTimerCompare(void) __attribute__ ( ( signal, naked, used, externally_visible ) );


void devSigTimerOverflow(void) __attribute__ ( ( signal, naked, used, externally_visible ) );


#if defined(devSigWatchdogTimeout)
  void devSigWatchdogTimeout(void) __attribute__ ( ( signal, naked, used, externally_visible ) );
#endif


#endif /* FEMTOOS_PORT_H */

---